An Efficient Resource Shared RISC-V Multicore Architecture

EM2: A Scalable Shared-Memory Multicore Architecture

We introduce the Execution Migration Machine (EM2), a novel, scalable shared-memory architecture for large-scale multicores constrained by off-chip memory bandwidth. EM2 reduces cache miss rates, and consequently off-chip memory usage, by permitting only one copy of data to be stored anywhere in the system: when a thread wishes to access an address not locally cached on the core it is executing...

A RISC-V Extension for the Fresh Breeze Architecture

We report on a RISC-V extension for a novel multi-core computer organization able to execute applications with high performance and energy efficiency. Novel features of this architecture include support for data objects represented by trees of 128-byte memory chunks, and hardware implementation of task scheduling and load balancing. We call our project Fresh Breeze1 in view of its novelty and p...

Labeled RISC-V: A New Perspective on Software-Defined Architecture

Traditional computer architectures are insufficient to convey important high-level requirements of applications to the hardware. These requirements include QoS and security, which are extremely important to data centers in the cloud era. To guarantee better QoS in data centers, we propose a new computer architecture LvNA (Labeled von Neumann Architecture) that leverages labeling mechanism and p...

Shared resource management for efficient heterogeneous computing

Efficient Resource Utilization in Shared-Everything Environments

E cient resource usage is a key to achieve better performance in parallel database systems. Up to now, most research has focussed on balancing the load on several resources of the same type, i.e. balancing either CPU load or I/O load. In this paper, we present oating probe, a strategy for parallel evaluation of pipelining segments in a shared-everything environment that provides dynamic load ba...